Benchmarking: Coremark
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Decompress
root@jph1:~# tar zxvf coremark_v1.0
cd coremark_v1.0Adjust compilation flags
Seems to be in ./linux64/core_portme.mak
- Change
PORT_CFLAGSvalue to-O3 - Add extra flags to the end of the
CFLAGSstatement
For example (added -funroll-all-loops --param max-inline-insns-auto=200):
CC = gcc
# Flag: CFLAGS
# Use this flag to define compiler options. Note, you can add compiler options from the command line using XCFLAGS="other flags"
PORT_CFLAGS = -O3
FLAGS_STR = "$(PORT_CFLAGS) $(XCFLAGS) $(XLFLAGS) $(LFLAGS_END)"
CFLAGS = $(PORT_CFLAGS) -I$(PORT_DIR) -I. -DFLAGS_STR=\"$(FLAGS_STR)\" -funroll-all-loops --param max-inline-insns-auto=200Run benchmark (single thread)
Run benchmark with make:
root@jph1:~/coremark_v1.0# pwd
/root/coremark_v1.0
root@jph1:~/coremark_v1.0# makeFaster systems
If you have a fast system (faster than a RaspberryPi), increase the number of iterations to increase the test run to give a more meaningful result:
root@jph1:~/coremark_v1.0# make ITERATIONS=1000032-bit ARM systems
Coremark seems to have an issue when not running in a linux64 environment (e.g. 32-bit ARM). Add a flag to the make command:
root@jph1:~/coremark_v1.0# make PORT_DIR=simpleRun benchmark (multi thread)
root@jph1:~/coremark_v1.0# make XCFLAGS="-DMULTITHREAD=8 -DUSE_PTHREAD"Results
| CPU | Freq | Cores | Coremark | Coremark/MHz | Coremark/Core | Parallel Execution | Compile Flags |
|---|---|---|---|---|---|---|---|
| MIPS | |||||||
| Cavium Octeon II CN6880 | 2.50GHz | 10 | 25671 | 10.268 | 2567 | 10 Threads | |
| Cavium Octeon II CN6880 | 2.50GHz | 10 | 31172 | 12.468 | 3117 | 10 Threads | -O3 -funroll-all-loops --param max-inline-insns-auto=200 |
| ARM | |||||||
| Calxeda Highbank (Cortex A9) | 1.40GHz | 4 | ??? | ??? | 2941 | 1 Thread | |